The invention relates generally to the field of differential amplifiers and operational amplifiers, and more particularly to an integrated circuit amplifier having a rail-to-rail common mode range both at the amplifier inputs and the amplifier output, and still more particularly to such an operational amplifier which is capable of linear, high speed operation with a rail-to-rail supply voltage of as little as approximately 1.2 volts.
The closest prior art includes U.S. Pat. No. 5,311,145 entitled "Combination Driver-Summing Circuit for Rail-to-Rail Differential Amplifier" issued May 10, 1994 to Huijsing et al. and incorporated herein by reference, the article "Compact Low-Voltage Power-Efficient Cells for VLSI", by K. Langen and J. Huijsing, IIIE Journal of Solid State Circuits, Volume 33, No. 10, pp. 1482-1496, and the article "Design Aspects of Rail-to-Rail CMOS OpAmp", by Gierkink, Holzmann, Wiegerink, and Wassenaar, proceedings of the 1st VLSI Workshop, May 6-8, 1997, Columbus, Ohio, pp. 23-28.
FIG. 1 of prior art U.S. Pat. No. 5,311,145 discloses an operational amplifier capable of "rail-to-rail operation". It includes a differential amplifier input stage that includes two pairs of differentially coupled input transistors, one with a tail current to the positive rail and the other with a tail current to the negative rail. A summing circuit is divided into first and second parts biased with a current from a single common floating current source to combine. The drain electrodes of the first pair of input transistors are coupled to the first part, and the drain electrodes of the second par of input transistors are coupled to the second part. A class A-B driver/output stage is coupled to the summing circuit to drive at least one output signal and which is operative over nearly the full rail-to-rail supply voltage range. The article by Langen and Huijsing mainly discloses the circuitry in U.S. Pat. No. 5,311,145 in more detail. The paper by Gierkink, Holzmann, Wiegerink, and Wassenaar discloses use of a gain boost amplifier with a cascode connection and a differential amplifier. The circuitry disclosed in this reference is very complex, and needs a large compensation capacitor. There is a need to provide a simpler circuit.
The circuit described in U.S. Pat. No. 5,311,145 is a two-stage circuit that does not have the capability of operating at a rail-to-rail supply voltage of less than approximately 2.2 volts. The gain of this circuit is too low for many applications. The speed-power figure of merit for the circuits described in U.S. Pat. No. 5,311,145 is much lower than desirable at the lower rail-to-rail supply voltage.
Accordingly, there is an unmet need for a much faster rail-to-rail input/output operational amplifier operable at lower rail-to-rail supply voltages than the closest prior art and also operable at a much higher gain-speed-power figure of merit even at the lowest end of the rail-to-rail supply voltage range.